amount of test effort (only the test equipment
must be provided), leading to minimal costs.
All in all, there are a significant number
of advantages a designer benefits from to a
large extent. That obviously compensates the
manageable effort in test generation.
What is JTAG/Boundary Scan?
JTAG/Boundary Scan is the world’s only
standardized electric test method (IEEE Std.
1149.x). Stimulating and measuring the
single circuitries on assemblies is no longer
executed via predetermined test points and
its connected metrology but rather Boundary
Scan cells integrated into a component. The
IC architecture is shown in Figure 1.
Necessary information transmission between test system and Boundary Scan component is executed via a standardized four-wire
test bus. The test bus must be considered
in board design, sort of replacing the test
points that would have been determined for
an In-Circuit Test (ICT) or Flying Probe Test
(FPT). Consequently, a test system must only
provide a port for this test bus.
As test points are no longer required, there
aren’t the same access problems as for ICT or
FPT. Upon closer examination of Figure 1, it
can clearly be seen that the Boundary Scan
cells are located between the component’s
pins and its inner logic. Hence, the core
logic no longer plays a role for testing board
circuitries. It doesn’t matter whether it is a
processor or PLD.
How does a Boundary Scan test work? Figure 2 is meant to illustrate this. First, a Boundary Scan component is switched to the external test mode (EXTEST). This is done by means
of a signal interchange at Test Clock (TCK) and
Test Mode Select (TMS) as well as setting a
respective command via Test Data Input (TDI).
From this moment on, the IC’s inner logic is
separated from the pins. Now the Boundary
Scan cell is exclusively responsible for the
signal level at the component pin. Loaded
with 1 or 0, a high level or low level is driven,
respectively. Generally, at each pin, there is a
Boundary Scan cell for level measurement. It
helps to verify the test pattern and therefore
check interconnections. It’s that simple.
Boundary Scan—like any other test tech-
nology—requires design rules that must be
considered. If such design rules are disre-
garded, the achievable test depth might be
considerably affected or, in extreme cases,
completely lost. Nothing is “sadder” than a
board that cannot be tested because of one
missing interconnection. But there’s no need
to worry about possibly “many” design
rules. Convenient software provides support
for rule compliance. Moreover, it once again
demonstrates that it makes sense to start
with test generation at a very early stage of
product design. Once the layout is finalized,
things are relatively hard to change.
JTAG/Boundary Scan is not only the most
efficient test method for digital components;
in particular, at the design stage, it provides
a number of advantages enabling completely
new test approaches and previously unob-
tainable high quality. The following aspects
are worth noting:
• High-value test as early as the first proto-
type stage in series quality
• In-system programming and test utilizing
the same interface
• Ideal interface for EMS
Compared to technological benefits, the
requirements Boundary Scan puts on equip-
ment, know-how, and Design-for-Testability
seem insignificantly small.
With trends towards more and more compact packaging that restricts mechanical pin
access and increasing integration density, the
future belongs to Boundary Scan. And that
future starts in the design divisions and the
How test instrument manufacturers can
design to meet the expectations of new
and experienced engineers
By Jonathan Tucker, Keithley Instruments, Inc.
A recent industry study indi-
cates one out of five electrical
engineers now in the global
workforce has started his or her
career within the last 10 years. These newer
engineers tend to be more software-oriented
than some of their more experienced col-
leagues due to recent changes in universities’
electrical engineering curricula.But today’s
instruments users are not just electrical
engineers. Many have been trained in other
disciplines, like mechanical engineering, elec-
trochemistry, biology, physics, etc., but still
TEST & MEASUREMENT